What is New in eCADSTAR 2021

Check for creepage in 3D based on voltage differences and standards (eCADSTAR Advanced 3D and Ultimate only).

2D clearance is always less than or equal to 3D clearance; but working to 3D creepage rules means you can design more densely, because clearance is measured by its true path. For example, making a slot in the PCB can allow other components to be placed more closely to a high-voltage avalanche diode bias supply.

Check electrical safety. Particularly important for designs with high-voltage routing such as LIDAR. Cross-probe to the canvas and view in 2D or 3D with traffic-light Pass, Caution, Fail color coding. 

You can set creepage rules in both Library Editor and Constraint Browser (Schematic Editor and PCB Editor) and you can even set your own formula to calculate clearances.

Control SPICE simulation from Schematic Editor

The eCADSTAR SPICE controller will provide a tightly integrated engineering solution for easy simulation of analog circuits within eCADSTAR Schematics, making eCADSTAR a single point for PCB design and simulation.

Engineers will be able to view graphical waveforms, conduct what-if analysis, change discrete component values and sweep simulation parameters using an embedded version of the free high-performance simulation software LTspice® from Analog Devices.

Integrate external applications, adding them to the Quick Access Toolbar, so you can launch them without leaving eCADSTAR. 

Now, if you select “Open Report in Excel”, a report in Comma-Separated-Values format called “report.csv” is opened as a spreadsheet, replacing multiple steps with just one.

You could already configure your own reports. Now make them accessible directly from eCADSTAR.

Once you add the path to a user report parameter file (.prgx), you can select it for generation from a dropdown list.

You can decide where to access user commands, both when you create them and when you edit them.

When you add or edit a user command, you can decide where to make it available for selection.

Now you can select power, ground, sheet connector, hierarchy connector and global signal symbols directly on the ribbon.

You can select symbols directly on the ribbon in Schematic Editor – a great time-saver, because engineers use these symbols a lot – often many times, even on the same sheet.

Now you can import DXF drawing data created by mechanical CAD systems in both Library Editor and Schematic Editor.

DXF is a widely-used industry format in mechanical graphics applications. You may already have logos or symbols in that format. Now you can import them instead of redrawing them.

Keep design information directly within schematic design data for reliable future reference.

Enter unique design-related information directly with automatic recording of creation and modification times.

Customize sheet number format.

Customize sheet numbering format and reflect block hierarchy.

Configure and display enriched cross-reference information on sheet connectors.

You can configure the cross-reference format from the ribbon.

Optionally omit “I” and “O” from zone letters to conform to standards or to avoid confusion with one and zero.

You can omit characters “I” and “O” from zone letters if you wish.

Import EDIF schematic data.

Import EDIF 200 data so you can re-use IP from more external sources.

Change angled trunk corners into curves and adjust radii on the PCB Editor canvas.

Curved trunk corners can improve stress resilience and smooth-out track-to-track coupling discontinuities. Direct interactive editing means you can see exactly what kind of corner you are getting in real time.

Move (or duplicate move) trunks with full corner and via pattern retention.

Move, flip and rotate trunks with no loss of via patterns or trunk geometry. You can do the same with duplicate-move, providing fast, easy re-use of trunk patterns for maximum PCB design consistency and symmetry.

Override package-based parasitic models.

Decoupling capacitors come in many package styles and all of them create different parasitics. Experiment easily, by swapping package-based models without the need to change design data. A bit close to the voltage limits with that decoupler? How about changing it to a 25V? That’s in a bigger package, but will its parasitics give you a problem?

Easily identify high-current vias. 

High-current vias harm power integrity. Need a bigger via? Need an extra via? The high DC current in this via is revealed by sorting the column on via current. You can then adjust or add vias in PCB Editor (shown above the Power Bus window in this image).

Configure cell buttons.

This button in the Radiation window has been configured to display the spectrum. Alternative functions are still available on the right-mouse-button menu.

Set impedance masks to check and measure against expected power bus impedance in PCB design.

Presented in a similar way to eye masks, impedance masks mean you can check potential local impedance hotspots against the expected impedance over a range of frequencies.

Reduce aliasing noise with windowing.

Fast Fourier Transform (FFT) sampling is designed to work with a round number of complete waveform cycles. This is not always the case and aliasing can make results unreliable. Windowing techniques like the Hann window function counter this effect.

And when you have some frequency domain results, you can now configure a cell button in Analysis Result Viewer to view them more easily.

Configure a cell button for frequency-domain mode.

Choose PCB layer stack directly from Schematic Editor.

Layer stack decisions are often made before or during schematic entry. You can make those decisions right here in Constraint Browser as your design takes shape.

DRC options are saved and selected by default next time you work on a schematic.

As schematic entry progresses, the DRC check options usually progress. Now you don’t have to reselect those options each time you launch Schematic Editor.